Semiconductor device modeling, simulation, and characterization.Embedded and IoT-based systems design.OBE and OBTL for electronics engineering education.Behavioral FSM synthesis in SystemVerilog and VHDL.Hardware/Software co-simulation for FPGA-based image processing.Material science including nanomaterials.Photonics, plasmonics, and nanophotonics.Analog, digital, and mixed-signal VLSI circuit design.Machine and deep learning in electronic devices.
To become an internationally recognized advanced research group in the fields of electronics and materials science to shape our future nation and the world.
1. To create electronic system solutions for current and future electronic technology-based business growth. 2. To stimulate and support the development of the high-tech electronics industry ecosystem in Bangladesh. 3. To develop homemade semiconductor device fabrication technology. 4. To contribute to providing transnational human resources in the global electronics industry meeting the challenges of the 4IR. 5. To focus on research of mass-produced AI-based electronic products. 6. To undertake leadership in core research areas of electronic and materials science at home and abroad by developing competencies.
The development of technology has simplified and expedited daily activities. Keeping up with the latest developments in any field is crucial to ensuring widespread interest and success. To keep up wit...
Electronic devices are one of the pioneering technologies of the present advanced world. Smart materials are now very cutting-edge topics of research to be integrated for overcoming the challenges of ...
Advancements in wearable health monitoring present a promising avenue for personalized healthcare, integrating seamlessly into daily routines and facilitating early detection of health issues. This re...
The significant increase in power dissipation within the sub-micrometer operational range necessitates the development of low-power circuitry. However, the continuous scaling of CMOS logic circuits en...
During a fire in a building, detection of human presence becomes critically important for rescue efforts by the fire safety department. Fire incidents create low-light or completely dark conditions. M...
Implicit style finite state machines (FSM) theoretically allow designers to describe a fully digital system with FSM and datapath with a single unified description. This concise FSMD model uses only a...
Convolutional neural networks (CNNs) have achieved extraordinary success in object recognition, detection, and image segmentation. However, conventional spatial domain CNNs are computationally expensi...
The activation function (AF) is a critical functional block for convolutional neural network (CNN) models including spectral domain CNNs (SpCNNs). State-of-the-art AFs for SpCNNs exhibit high computat...
Humans could not traverse to every point on the surface, yet they still require information about such locations, such as in the fields of astronomy, geology, the military, etc. As a result, researche...
This project presents the design and implementation of an Automated Pet Feeder System leveraging the Arduino Uno microcontroller. The system integrates various components, including servo motors for f...
Carbon dioxide (CO2) is a potential biomarker for local tissue ischemia associated with pressure ulcers (PUs) formation. Skin CO2 measurement could provide an earlier indicator for pressure-induced ti...
In this research, we are trying to investigate the performance of different state-of-the-art gate materials in MOSFETs. This study aims at the basic phenomenon occurring in the current voltage charact...
The design and implementation of a 3-bit irregular sequence counter are presented in this report. Three JK flip-flops are used to implement the counter, and their outputs are connected to one another's inputs to form a feedback loop. The flip-flops' outputs will toggle in a predetermined order thanks to the feedback loop, and this will produce the counter's output. The counter is built to produce a wide range of irregular sequences while also being as effective as possible. The counter is also made to be simple to implement in hardware, requiring the least number of parts. The counter has been implemented and tested in a Cadance simulator. The results of the simulation show that the counter can generate the desired irregular sequences correctly. The circuit-designed technology kit is gpdk045 (45nm Generic Process Design Kit).
This work presents a comprehensive study of the design and performance analysis of a 2-bit Arithmetic Logic Unit (ALU). The ALU can execute four arithmetic operations and three logical operations. Performance metrics, including propagation delay, power consumption, area, throughput, and accuracy, are thoroughly examined. The efficiency of CPU processing data depends on the processing of ALU. The arithmetic logic unit (ALU) is the core of a CPU in a computer. The adder cell is the elementary unit of an ALU. The results offer insights into optimizing the ALU design to enhance digital system efficiency and functionality. The students will also perform transient analysis on their circuits, analyze their responses, create the symbols of the circuits, and include the layout design of the circuits. Through continuous practice, it helps to develop the skills in using the basic features of Cadence Virtuoso, which will be useful in their future endeavors in the field of integrated circuit design.
Numerous applications, such as clock recovery, frequency synthesis, and communication systems, typically make use of the phase-locked loop (PLL) control system technique. The PLL structures and the numerous applications they have are thoroughly examined in this work. Beginning with a basic overview of the fundamental ideas underlying PLL operation, it then goes on to designing and carrying out pre-post layout simulations under different PVT conditions of its key components, including the phase frequency detector, charge pump, loop filter, Voltage-Controlled Oscillator (VCO), and frequency divider.
In this work, we discuss the Low Noise Amplifier, its purpose, working principles, and circuitry explained with diagrams. LNA is going to be designed in Cadence Virtuoso Simulating Tool and its performance parameters will be generated. The design will be designed in 45 nm GPDK technology. The primary purpose of this research is to design the LNA to work independently of the generalized LNA where it is coupled with an antenna.
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